
ibrahim Kamal
EmployedLast updated last monthSenior ASIC Engineer with 5+ years of experience in RTL Design, Verification, and Physical Design. Skilled in advanced-node (1.8nm, 2nm,...) ASIC implementation, timing closure, ECO, Synopsys tools
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Senior ASIC Engineer with 5+ years of experience in RTL Design, Verification, and Physical Design. Skilled in advanced-node (1.8nm, 2nm,...) ASIC implementation, timing closure, ECO, Synopsys tools
AI Engineer @GlobalAssess360
Architected a 32 GS/s time-interleaved SAR ADC in 22nm FDSOI for a PCIe 6.0 SERDES PHY transceiver. Delivering this complex graduation project, sponsored by Si-Bits, is my proudest engineering milestone to date.
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Software Engineer specializing in designing and developing scalable web applications using Python, Flask,React.js, and Next.js.
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